Blame | Last modification | View Log | RSS feed
* Created in LTspice Version XVII *
* *
* GaN Systems Inc. Power Transistors *
* LTSpice Library for GaN Transistors *
* Version 4.1 *
* *
*****************************************************************
*****************************************************************
* *
* Models provided by GaN Systems Inc. are not warranted by *
* GaN Systems Inc. as *
* fully representing all of the specifications and operating *
* characteristics of the semiconductor product to which the *
* model relates. The model describe the characteristics of a *
* typical device. *
* In all cases, the current data sheet information for a given *
* device is the final design guideline and the only actual *
* performance specification. *
* Altough models can be a useful tool in evaluating device *
* performance, they cannot model exact device performance under *
* all conditions, nor are they intended to replace bread- *
* boarding for final verification. GaN Systems Inc. therefore *
* does not assume any liability arising from their use. *
* GaN Systems Inc. reserves the right to change models without *
* prior notice. *
* *
* This library contains models of the following GaN Systems *
* Inc. transistors: *
* *
* GS61008P *
*****************************************************************
*Level 3. In addition to Level 2, this level includes the stray inductance in the package.
*$
*$
.subckt GaN_LTspice_GS61008P_L3V4P1 gatein drainin sourcein source_S TC TJ
*
*
.param rTC=-0.004 gan_res={3.38e-03} metal_res={2.0e-3} gtc=3.275 sh_s=0.239 sh_d=0.761
.param cur=0.089 x0_0=1.1 x0_1=1.1 x0_2=1.0 thr=1.8 itc=0.83 atc=180.15
*
*
.param tscl = 0.5
Cth_1 0 TJ {(7.0e-4)*tscl}
Cth_2 0 T11 {(6.7e-3)*tscl}
Cth_3 0 T22 {(5.9e-3)*tscl}
Cth_4 0 T33 {(1.8e-3)*tscl}
*
*
Rth_1 T11 TJ {0.017}
Rth_2 T22 T11 {0.253}
Rth_3 T33 T22 {0.264}
Rth_4 TC T33 {0.017}
*
*
bdtemp 0 TJ I = (if(v(drain,source)>0,
+ (cur*(-(v(TJ)-25)*itc+atc)*log(1.0+exp(26*(v(gate,source)-thr)))*
+ v(drain,source)/(1 + max(x0_0+x0_1*(v(gate,source)+x0_2),0.2)*v(drain,source)))*
+ v(drain,source),
+ (cur*(-(v(TJ)-25)*itc+atc)*log(1.0+exp(26*(v(gate,drain)-thr)))*
+ v(source, drain)/(1 + max(x0_0+x0_1*(v(gate,drain)+x0_2),0.2)*v(source,drain)))*
+ v(drain,source)))
*
*
ld drainin drain3 {370e-12} Rser=0
ERES_d drain3 3_d value={I(VSENSE_d)*sh_d* (metal_res*(1-1*rTc*(V(TJ)-25)) + gan_res*PWR((v(TJ)+273)/298,gtc)) }
VSENSE_d 3_d drain DC 0
*
*
VSENSE_s 3_s source DC 0
ERES_s source3 3_s value={I(VSENSE_s)* sh_s * (metal_res*(1-1*rTc*(V(TJ)-25)) + gan_res*PWR((v(TJ)+273)/298,gtc)) }
Lcs source3 source3b {20e-12}
Ls sourcein source3b {150e-15} Rser=0
*
*
RSS source_S1 source3b {0.001}
LSS source_S source_S1 {0.2e-9} Rser=0
rg gatein gate1 {1.5}
Lg gate1 gate {3.1e-9} Rser=0
*
*
Rcsdconv drain source {4000Meg}
Rcgsconv gate source {4000Meg}
Rcgdconv gate drain {4000Meg}
*
*
bswitch drain2 source2 I = (if(v(drain2,source2)>0,
+ (cur*(-(v(TJ)-25)*itc+atc)*log(1.0+exp(26*(v(gate,source2)-thr)))*
+ v(drain2,source2)/(1 + max(x0_0+x0_1*(v(gate,source2)+x0_2),0.2)*v(drain2,source2))),
+ (-cur*(-(v(TJ)-25)*itc+atc)*log(1.0+exp(26*(v(gate,drain2)-thr)))*
+ v(source2, drain2)/(1 + max(x0_0+x0_1*(v(gate,drain2)+x0_2),0.2)*v(source2,drain2)))))
*
*
R_drain2 drain2 drain {(1e-7)}
R_source2 source2 source {(1e-7)}
*
*
*
C_GS gate source {6.04e-10}
C_GS1 gate source Q = ( - 14.08e-11*(1-1./(1+exp(0.32*(-v(drain, source)+8.0))))
+ - 1.653e-11*(1-1./(1+exp(0.029*(-v(drain, source)+80.0))))
+ - 1.5e-10*(-1+1./(1+exp(0.16*(-v(drain, source)-2.1)))) )*x
*
*
C_GS2 gate source Q = ( 1.0e-010*log(1+exp(6.1*(x-2.2))))
*
*
C_GD gate drain {0.6e-012}
C_GD1 gate drain Q = ( 44e-11*log(1+exp(0.32*(x+8)))+
+ 57e-11*log(1+exp(0.029*(x+80))) )
*
*
C_SD source drain {2.18e-010}
C_SD1 source drain Q = (
+ 44e-11*log(1+exp(0.32*(x+8)))+
+ 57e-11*log(1+exp(0.029*(x+80)))+
+ 1.95e-10*log(1+exp(1.19*(x+16)))+
+ 1.69e-9*log(1+exp(0.07*(x+31))) )
*
*
.ends
*$