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* PSpice Model Editor - Version 16.2.0
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*$
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* LM5114A
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*****************************************************************************
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* (C) Copyright 2013 Texas Instruments Incorporated. All rights reserved.
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*****************************************************************************
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** This model is designed as an aid for customers of Texas Instruments.
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** TI and its licensors and suppliers make no warranties, either expressed
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** or implied, with respect to this model, including the warranties of
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** merchantability or fitness for a particular purpose. The model is
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** provided solely on an "as is" basis. The entire risk as to its quality
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** and performance is with the customer
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*****************************************************************************
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*
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** Released by: WEBENCH Design Center, Texas Instruments Inc.
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* Part: LM5114A
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* Date: 18FEB2013
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* Model Type: TRANSIENT
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* Simulator: PSPICE
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* Simulator Version: 16.2.0.p001
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* EVM Order Number: LM5114 EVAL BOARD
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* EVM Users Guide: SNVA625–January 2012
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* Datasheet: SNVS790D–JANUARY 2012–REVISED AUGUST 2012
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*
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* Model Version: Final 1.00
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*
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*****************************************************************************
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* Updates:
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*
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* Final 1.00
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* Release to Web.
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*****************************************************************************
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.SUBCKT LM5114A IN INB VDD P_OUT N_OUT VSS
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V_V2 N16505370 VSS 3.8
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E_ABM4 N16515305 0 VALUE { 0.34*V(VDD) }
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X_U3 INB N16505719 N16515305 N16504880 COMPHYS_BASIC_GEN PARAMS: VDD=1
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+ VSS=0 VTHRESH=0.5
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E_ABM3 N16505719 0 VALUE { 0.67*V(VDD) }
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X_U5 UVLO N14509334 N3 N16510505 AND3_BASIC_GEN PARAMS: VDD=1 VSS=0
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+ VTHRESH=500E-3
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X_U1 VDD N16505370 N165112383 UVLO COMPHYS_BASIC_GEN PARAMS: VDD=1
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+ VSS=0 VTHRESH=0.5
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X_S1 N14508796 VSS VDD P_OUT LM5114A_S1
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T_T1 N16510505 VSS N16508556 VSS Z0=1000 TD=10n
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E_ABM1 N16505537 0 VALUE { 0.67*V(VDD) }
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X_U2 IN N16505537 N16514778 N14509334 COMPHYS_BASIC_GEN PARAMS: VDD=1
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+ VSS=0 VTHRESH=0.5
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X_U4 N16504880 N3 INV_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3
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R_R1 VSS N16508556 1k TC=0,0
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V_V1 N165112383 VSS 0.4
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X_S2 N14508796 VSS N_OUT VSS LM5114A_S2
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E_ABM2 N16514778 0 VALUE { 0.34*V(VDD) }
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X_U6 N16508556 N14508796 INV_BASIC_GEN PARAMS: VDD=1 VSS=0
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+ VTHRESH=500E-3
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.ENDS LM5114A
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*$
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.SUBCKT LM5114A_S1 1 2 3 4
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S_S1 3 4 1 2 _S1
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RS_S1 1 2 1G
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.MODEL _S1 VSWITCH Roff=1e6 Ron=3.85 Voff=0.6 Von=0.4
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.ENDS LM5114A_S1
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*$
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.SUBCKT LM5114A_S2 1 2 3 4
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S_S2 3 4 1 2 _S2
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RS_S2 1 2 1G
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.MODEL _S2 VSWITCH Roff=1e6 Ron=0.66 Voff=0.4 Von=0.6
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.ENDS LM5114A_S2
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*$
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.SUBCKT COMPHYS_BASIC_GEN INP INM HYS OUT PARAMS: VDD=1 VSS=0 VTHRESH=0.5
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EIN INP1 INM1 INP INM 1
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EHYS INP1 INP2 VALUE { IF( V(1) > {VTHRESH},-V(HYS),0) }
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EOUT OUT 0 VALUE { IF( V(INP2)>V(INM1), {VDD} ,{VSS}) }
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R1 OUT 1 1
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C1 1 0 5n
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RINP1 INP1 0 1K
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.ENDS COMPHYS_BASIC_GEN
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*$
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.SUBCKT AND3_BASIC_GEN A B C Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5
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E_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} &
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+ V(B) > {VTHRESH} &
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+ V(C) > {VTHRESH},{VDD},{VSS})}}
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RINT YINT Y 1
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CINT Y 0 1n
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.ENDS AND3_BASIC_GEN
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*$
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.SUBCKT INV_BASIC_GEN A Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5
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E_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} ,
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+ {VSS},{VDD})}}
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RINT YINT Y 1
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CINT Y 0 1n
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.ENDS INV_BASIC_GEN
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*$
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.SUBCKT POWERMOS G D S PARAMS: RDSON=16m Ciss=1375p Crss=70p Coss=340p VSP=3.5 RG=1
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* This is a simple model for Power MOSFET.
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* The parameters modeled are
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* - RDSon,
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* - Input Capacitance,
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* - Reverse capacitance,
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* - Output capacitance,
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* - Switching point voltage (Gate voltage where the FET starts switching),
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* - Gate Resistance
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C_C1 S Da {Coss} IC=0
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R_R1 Da D 10
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C_C2 Ga D {Crss} IC=0
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R_R2 G Ga {RG}
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C_C3 Ga S {Ciss} IC=0
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D_D1 S Db Dbreak
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R_R3 Db D 1m
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S_switchM D S Ga S _switchM
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RS_switchM Ga S 100Meg
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.MODEL _switchM VSWITCH Roff=100e6 Ron={RDSON} Voff=1.1 Von={VSP}
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.model Dbreak D Is=1e-14 Cjo=.1pF Rs=.01
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.ENDS POWERMOS
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*$
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.MODEL DIODE D
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+ RS=.5
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+ CJO=100.00E-15
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+ M=.3333
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+ VJ=.75
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+ ISR=100.00E-12
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+ BV=100
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+ IBV=100.00E-6
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+ TT=5.0000E-9
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*$
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